Many processing systems require generation of clock signals at varying frequencies. Typically, a programmable clock generator includes tuning circuitry to define a clock frequency to be generated by the clock generator. Conventional clock generator designs include a voltage controlled oscillator with system components whose operational current is controlled to provide a clock signal at a desired frequency.
Ring oscillators are the architecture of choice to achieve higher tuning range in clock generators. The most common ways of improving tuning range is by varying the size of capacitors or transconductance elements within control circuits. However, these techniques have associated penalties. Capacitors, for example, are area-intensive devices which consume increasing amounts of area when the clock generators are manufactured in integrated circuits. At the lowest frequencies within the tuning range, the transconductance stages generate a lot of noise compared to the signal resulting in poor jitter performance. Accordingly, the inventor has identified a need in the art to provide a control circuit for clock generators that provide adequate control and mitigate against such penalties.